1. Field of the Invention
The invention relates to an electrostatic discharge (ESD) protection circuit, and in particular relates to an ESD protection circuit using diffusion resistors and parasitic diodes of the diffusion resistors.
2. Description of the Related Art
For semiconductor manufacturing process development, dimensions of complementary metal-oxide-semiconductor transistor (CMOS) have reached sub-micron level to upgrade the performance of very large scale integrated (VLSI) circuits and computational speed. As dimensions shrinks, reliability and ESD tolerance of VLSI circuits decline significantly.
ESD models include human-body model (HBM), machine model (MM), and charged-device model (CDM). All three generate instantaneous current of several amperes only for hundreds of or even several nanoseconds.
Due to the size of the VLSI circuit shrinking to a micrometer or nanometer, the VLSI circuits are easily damaged by electrostatic discharge (ESD) when the electrostatic discharge current exorbitantly exceeds the internal circuit limit. If the circuit line width of the VLSI circuit is increased, the VLSI circuit can tolerate or endure a much bigger ESD current but the size of the VLSI circuit increases. Additionally, increasing circuits in one chip would increase the chip size. An alternative way to avoid ESD damage in VLSI circuits is to prevent electrostatic discharge current from flowing through the internal circuits, wherein, limiting the electrostatic discharge current from flowing through the internal circuits is the focus of this invention.